AD745JN 查看數據表（PDF） - Analog Devices
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AD745JN Datasheet PDF : 12 Pages
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AD745–SPECIFICATIONS (@ +25؇C and ؎15 V dc, unless otherwise noted)
Model
INPUT OFFSET VOLTAGE1
Initial Offset
Initial Offset
vs. Temp.
vs. Supply (PSRR)
vs. Supply (PSRR)
INPUT BIAS CURRENT3
Either Input
Either Input
@ TMAX
Either Input
Either Input, VS = ± 5 V
INPUT OFFSET CURRENT
Offset Current
@ TMAX
FREQUENCY RESPONSE
Gain BW, Small Signal
Full Power Response
Slew Rate
Settling Time to 0.01%
Total Harmonic
Distortion4
INPUT IMPEDANCE
Differential
Common Mode
INPUT VOLTAGE RANGE
Differential5
Common-Mode Voltage
Over Max Operating Range6
Common-Mode
Rejection Ratio
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
OPEN LOOP GAIN
OUTPUT CHARACTERISTICS
Voltage
Current
POWER SUPPLY
Rated Performance
Operating Range
Quiescent Current
Conditions
TMIN to TMAX
TMIN to TMAX
12 V to 18 V2
TMIN to TMAX
VCM = 0 V
VCM = 0 V
VCM = +10 V
VCM = 0 V
VCM = 0 V
VCM = 0 V
G = –4
VO = 20 V p-p
G = –4
f = 1 kHz
G = –4
VCM = ± 10 V
TMIN to TMAX
0.1 to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 1 kHz
VO = ± 10 V
RLOAD ≥ 2 kΩ
TMIN to TMAX
RLOAD = 600 Ω
RLOAD ≥ 600 Ω
RLOAD ≥ 600 Ω
TMIN to TMAX
RLOAD ≥ 2 kΩ
Short Circuit
Min
90
88
–10
80
78
1000
800
+13, –12
+12, –10
± 12
20
± 4.8
AD745J/A
Typ
0.25
2
96
150
250
30
40
20
120
12.5
5
0.0002
1 × 1010ʈ20
3 × 1011ʈ18
± 20
+13.3, –10.7
95
0.38
5.5
3.6
3.2
2.9
6.9
4000
1200
+13.6, –12.6
+13.8, –13.1
40
± 15
8
Max
1.0/0.8
1.5
400
8.8/25.6
600
200
150
2.2/6.4
+12
5.0
4.0
V
V
± 18
10.0
Units
mV
mV
µV/°C
dB
dB
pA
nA
pA
pA
pA
nA
MHz
kHz
V/µs
µs
%
ΩʈpF
ΩʈpF
V
V
V
dB
dB
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
fA/√Hz
V/mV
V/mV
V/mV
V
V
mA
V
V
mA
TRANSISTOR COUNT
# of Transistors
50
NOTES
1Input offset voltage specifications are guaranteed after 5 minutes of operations at TA = +25°C.
2Test conditions: +VS = 15 V, –VS = 12 V to 18 V and +VS = 12 V to +18 V, –VS = 15 V.
3Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at TA = +25°C. For higher temperature, the current doubles every 10°C.
4Gain = –4, RL = 2 kΩ, CL = 10 pF.
5Defined as voltagc between inputs, such that neither exceeds ± 10 V from common.
6The AD745 does not exhibit an output phase reversal when the negative common-mode limit is exceeded.
All min and max specifications are guaranteed.
Specifications subject to change without notice.
–2–
REV. C
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