AD745AN 查看數據表（PDF） - Analog Devices
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AD745AN Datasheet PDF : 12 Pages
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AD745
HOW CHIP PACKAGE TYPE AND POWER DISSIPATION
AFFECT INPUT BIAS CURRENT
As with all JFET input amplifiers, the input bias current of the
AD745 is a direct function of device junction temperature, IB
approximately doubling every 10°C. Figure 30 shows the
relationship between bias current and junction temperature for
the AD745. This graph shows that lowering the junction
temperature will dramatically improve IB.
10 –6
10 –7
10 –8
VS = +-15V
TA = +25°C
10 –9
10–10
10–11
300
TA = +25°C
200
θJA = 165°C/W
100
θJA = 115°C/W
θJA= 0°C/W
0
5
10
15
SUPPLY VOLTAGE – ±Volts
Figure 32. Input Bias Current vs. Supply Voltage for
Various Values of θJA
TJ
10–12
–60 –40
–20 0 20 40 60 80 100 120 140
JUNCTION TEMPERATURE – °C
θA
(J TO
DIE MOUNT)
Figure 30. Input Bias Current vs. Junction Temperature
The dc thermal properties of an IC can be closely approximated
by using the simple model of Figure 31 where current represents
power dissipation, voltage represents temperature, and resistors
represent thermal resistance (θ in °C/watt).
TA
CASE
θB
(DIE MOUNT
TO CASE)
θ A + θ B = θJC
TJ
θJC
θ CA
θJA
PIN
TA
WHERE:
PIN = DEVICE DISSIPATION
T A = AMBIENT TEMPERATURE
TJ = JUNCTION TEMPERATURE
θ JC = THERMAL RESISTANCE – JUNCTION TO CASE
θ CA = THERMAL RESISTANCE – CASE TO AMBIENT
Figure 31. Device Thermal Model
From this model TJ = TA+θJA PIN. Therefore, IB can be
determined in a particular application by using Figure 30
together with the published data for θJA and power dissipation.
The user can modify θJA by use of an appropriate clip-on heat
sink such as the Aavid #5801. θJA is also a variable when using
the AD745 in chip form. Figure 32 shows bias current vs.
supply voltage with θJA as the third variable. This graph can be
used to predict bias current after θJA has been computed. Again
bias current will double for every 10°C. The designer using the
AD745 in chip form (Figure 33) must also be concerned with
both θJC and θCA, since θJC can be affected by the type of die
mount technology used.
Typically, θJC’s will be in the 3°C to 5°C/watt range; therefore,
for normal packages, this small power dissipation level may be
ignored. But, with a large hybrid substrate, θJC will dominate
proportionately more of the total θJA.
Figure 33. Breakdown of Various Package Thermal
Resistance
REDUCED POWER SUPPLY OPERATION FOR
LOWER IB
Reduced power supply operation lowers IB in two ways: first, by
lowering both the total power dissipation and, second, by
reducing the basic gate-to-junction leakage (Figure 32). Figure
34 shows a 40 dB gain piezoelectric transducer amplifier, which
operates without an ac coupling capacitor, over the –40°C to
+85°C temperature range. If the optional coupling capacitor,
C1, is used, this circuit will operate over the entire –55°C to
+125°C temperature range.
100Ω
10kΩ
C1*
10 8Ω**
TRANSDUCER
CT
CT**
+5V
AD745
–5V
10 8Ω
*OPTIONAL DC BLOCKING CAPACITOR
**OPTIONAL, SEE TEXT
Figure 34. A Piezoelectric Transducer
REV. C
–9–
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