UPD16772A 查看數據表（PDF） - NEC => Renesas Technology

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UPD16772A

480-OUTPUT TFT-LCD SOURCE DRIVER (COMPATIBLE WITH 64-GRAY SCALES)

NEC => Renesas Technology 

µPD16772A

8. RELATIONSHIP BETWEEN STB, CLK AND OUTPUT WAVEFORM

The output voltage is written to the LCD panel synchronized with the STB falling edge.

Figure 8–1. Output Circuit Block Diagram

DAC

Output Amp

-

+

SW1

VAMP(IN)

Sn

(VOUT)

Figure 8–2. Output Circuit Timing Waveform

CLK

(External Input)

[1]

[2]

STB

(External Input)

SW1 : ON

SW1 : OFF

SW1 : ON

VAMP(IN)

Sn

(VOUT: External output)

Output

Hi-Z

Output

Remarks 1. STB = L : SW1 = ON

STB = H : SW1 = OFF

2. STB = “H” is acknowledged at timing [1].

3. The display data latch is compensated at timing [2] and the input voltage (VAMP(IN) : gray-

scale level voltage) of the output amplifier changes.

10

Data Sheet S14725EJ1V0DS00

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