CXB1456R 查看數據表（PDF） - Sony Semiconductor
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CXB1456R Datasheet PDF : 17 Pages
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CXB1456R
Pin List
Table 1. Power/Ground
Pin name
Pin number
VDD
GND
VCC
VEE
VCCA
VEEA
VEES
8, 16, 20, 28, 53, 61, 64
1, 9, 17, 21, 29, 52, 60
26, 55
27, 54
44
45
46
Descriptions
MOS power supply, should be connected to 3.3V ± 0.3V
MOS ground, connected to 0V
ECL power supply, connected to 3.3V ± 0.3V
ECL ground, connected to 0V
Analog power supply, connected to 3.3V ± 0.3V
Analog ground, connected to 0V
Substrate GND, connected to 0V
Table 2. Digital Signals
Pin name
Pin
number
Type
Descriptions
SFTCLK
51
Shift clock, for the
TTL out data fetch at falling or
rising edge
RED (7 to 0)
GRN (7 to 0)
BLU (7 to 0)
18, 19,
22, 23,
24, 25,
30, 31
6, 7, 10,
11, 12,
TTL out
13, 14, 15
58, 59,
62, 63,
2, 3, 4, 5
Pixel data
HSYNC
56
TTL out Hsync data
VSYNC
57
TTL out Vsync data
CNTL
49
TTL out Control data
DE
50
TTL out Display enable data
LOS
36
TTL out Los of signal
PANEL (1, 0) 35, 34
TTL in
Panel mode select
switch
CLKPOL
32
TTL in
Trigger edge select
switch
CE
38
TTL in Chip enable
TESTEXN 43,
TESTDT
37
TTL in
Reversed for TEST
under fabrication
VCCA
TTL-IN
VEES
Equivalent circuit
VDD
TTL-OUT
GND
VDD
GND
–2–
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