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N25Q256A83E1240G 查看數據表(PDF) - Micron Technology

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N25Q256A83E1240G Datasheet PDF : 91 Pages
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3V, 256Mb: Multiple I/O Serial Flash Memory
Memory Organization
Memory Organization
Memory Configuration and Block Diagram
Each page of memory can be individually programmed. Bits are programmed from one
through zero. The device is subsector, sector, or bulk-erasable, but not page-erasable.
Bits are erased from zero through one. The memory is configured as 33,554,432 bytes (8
bits each); 512 sectors (64KB each); 8192 subsectors (4KB each); and 131,072 pages (256
bytes each); and 64 OTP bytes are located outside the main memory array.
Figure 5: Block Diagram
HOLD#
W#/VPP
S#
C
DQ0
DQ1
DQ2
DQ3
Control logic
Address register
and counter
High voltage
generator
64 OTP bytes
I/O shift register
256 byte
data buffer
Status
register
01FFFFFFh
PDF: 09005aef84566603
n25q_256mb_65nm.pdf - Rev. Q 05/13 EN
0000000h
00000FFh
256 bytes (page size)
X decoder
12
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