ST72324BLJ2B1 查看數據表（PDF） - STMicroelectronics

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ST72324BLJ2B1

3V range 8-bit MCU with 8 to 32K Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI interface

STMicroelectronics 

ST72324Lxx

1 DESCRIPTION

The ST72F324L and ST72324BL devices are

members of the ST7 microcontroller family de-

signed for mid-range applications running at 3.3V.

Different package options offer up to 32 I/O pins.

All devices are based on a common industry-

standard 8-bit core, featuring an enhanced instruc-

tion set and are available with Flash or ROM pro-

gram memory. The ST7 family architecture offers

both power and flexibility to software developers,

Figure 1. Device Block Diagram

enabling the design of highly efficient and compact

application code.

The on-chip peripherals include an A/D converter,

2 general purpose timers, an SPI interface and an

SCI interface.

For power economy, microcontroller can switch

dynamically into WAIT, SLOW, ACTIVE-HALT or

HALT mode when the application is in idle or

stand-by state.

Typical applications are consumer, home, office

and industrial products.

RESET

VPP

VSS

VDD

OSC1

OSC2

PF7:6,4,2:0

(6 bits on J and S devices)

(5 bits on K devices)

PE1:0

(2 bits)

PD5:0

(6 bits on J and S devices)

(2 bits on K devices)

VAREF

VSSA

8-BIT CORE

ALU

CONTROL

OSC

MCC/RTC/BEEP

PORT F

TIMER A

BEEP

PORT E

SCI

PORT D

10-BIT ADC

PROGRAM

MEMORY

(8K - 32K Bytes)

RAM

(384 - 2048 Bytes)

WATCHDOG

PORT A

PORT B

PORT C

TIMER B

SPI

PA7:3

(5 bits on J and S devices)

(4 bits on K devices)

PB4:0

(5 bits on J and S devices)

(3 bits on K devices)

PC7:0

(8 bits)

6/154

3

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