74HCT107D-Q100 查看數據表（PDF） - NXP Semiconductors.
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74HCT107D-Q100 Datasheet PDF : 17 Pages
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NXP Semiconductors
74HC107-Q100; 74HCT107-Q100
Dual JK flip-flop with reset; negative-edge trigger
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Min
Max
CI
input
- 3.5 -
pF
capacitance
74HCT107-Q100
VIH
HIGH-level
VCC = 4.5 V to 5.5 V
input voltage
2.0 1.6 -
2.0
-
2.0
-V
VIL
LOW-level
VCC = 4.5 V to 5.5 V
input voltage
- 1.2 0.8
-
0.8
-
0.8 V
VOH
VOL
II
ICC
ICC
HIGH-level
output voltage
LOW-level
output voltage
input leakage
current
supply current
additional
supply current
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
IO = 4 mA
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
IO = 4.0 mA
VI = VCC or GND;
VCC = 5.5 V
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
per input pin;
VI = VCC 2.1 V; IO = 0 A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
pin nCP, nJ
4.4
3.98
-
-
-
-
-
4.5
4.32
0
0.16
-
-
100
-
-
0.1
0.26
0.1
4.0
360
4.4
3.84
-
-
-
-
-
-
-
0.1
0.33
1.0
40
450
4.4
3.7
-
-
-
-
-
-V
-V
0.1 V
0.4 V
1.0 A
80 A
490
A
pin nR
-
65 234 -
293 -
319
A
pin nK
-
60 216 -
270 -
294
A
CI
input
capacitance
- 3.5 -
-
-
-
- pF
74HC_HCT107_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 November 2013
© NXP B.V. 2013. All rights reserved.
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