NX25F011A 查看數據表（PDF） - NexFlash -> Winbond Electronics
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NX25F011A
NexFlash -> Winbond Electronics
NX25F011A Datasheet PDF : 26 Pages
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NX25F011A
NX25F041A
Pin Descriptions
Package
The NX25F011A and NX25F041A are available in a 28-pin
TSOP (Type I) surface mount package. See Figure 3 and
Table 1 for pin assignments. All interface and supply pins
are on one side of the package. The “No Connect” (NC)
pins are not connected to the device, allowing the pads and
the area around them to be used for routing PCB system
traces. The devices are also available in a cost-effective
and space-efficient removable Serial Flash Module
package (see NX25Mxxx data sheet).
Serial Data Input (SI)
The SPI bus Serial Data Input (SI) provides a means for
data to be written to (shifted into) the device.
Serial Data Output (SO)
The SPI bus Serial Data Output (SO) provides a means for
data to be read from (shifted out of) the device during a read
operation. When the device is deselected (CS=1 or
HOLD=0) the SO pin is in a high-impedance state.
Serial Clock (SCK)
All commands and data written to the Serial Input (SI) are
clocked relative to the rising edge of the Serial Clock
(SCK). By default all data read from the Serial Data Output
(SO) is clocked relative to the falling edge of SCK, allowing
compatibility with standard SPI systems. The user may
specify reading relative to the rising edge of SCK by chang-
ing the setting of the RCE bit in the Configuration Register
(see Figure 6). Clock rates of up to 16 MHz for 5V devices
and up to 8 MHz for 3V devices are supported.
Chip Select (CS)
1 The NX25F011A and NX25F041A are selected for opera-
tion when the Chip Select input (CS) is asserted low. Upon
power-up, an initial low-to-high transition of CS is required
before any command sequence will be acknowledged. The
device can be deselected to a non-active state when CS is
2 brought high. Once deselected, the SO pin will enter a
high-impedance state and power consumption will
decrease to standby levels unless programming is in
process, in which case standby will resume when program-
ming is complete.
3
Write Protect (WP)
The Write Protect input (WP) works in conjunction with the
write protect range set in the configuration register bits.
4 When WP is asserted (active low) the entire Flash memory
array is write protected. When high, any Flash memory
sector can be written to unless its address is within the write
protect range that is set in the configuration register.
Hold or Ready/Busy (HOLD or R/B)
5
This multi-function pin can serve either as a
Hold input (HOLD) or as a Ready-Busy output (R/B).
6 Factory-programmed as a no connect, the pin can be
reconfigured as a Ready-Busy output or as a Hold input by
setting the configuration register. Warning: this pin is tied
low in the Serial Flash Module and must be left as a no
connect (NC).
Power Supply Pins (Vcc and GND)
7
The NX25F011A and NX25F041A support single power
supply Read and Erase/Write operations in 5V and 3V
8 versions. Typical active power is as low as 5 mA for the 3V
version with standby current less than 1 µA.
HOLD-R/B 1
NC 2
WP 3
NC 4
NC 5
VCC 6
GND 7
NC 8
NC 9
NC 10
CS 11
SCK 12
SI 13
SO 14
28
NC
27
NC
26
NC
25
NC
24
NC
23
NC
22
NC
21
NC
20
NC
19
NC
18
NC
17
NC
16
NC
15
NC
Figure 3. NX25F011A and NX25F041A
Pin Assignments, 28-Pin TSOP (Type I)
Table 1. Pin Descriptions
9
SI
SO
SCK
CS
WP
Hold, R/B
Vcc
GND
Serial Data Input
Serial Data Output
Serial Clock Input
10
Chip Select Input
Write Protect Input
11 Hold Input or Read Busy Output
Power Supply
Ground
12
NexFlash Technologies, Inc.
3
PRELIMINARY NXSF014B-0699
06/11/99
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