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73K324L-28IFR 查看數據表(PDF) - Teridian Semiconductor Corporation

零件编号
产品描述 (功能)
生产厂家
73K324L-28IFR
TERIDIAN
Teridian Semiconductor Corporation TERIDIAN
73K324L-28IFR Datasheet PDF : 30 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
73K324L
CCITT V.22bis,V.23,V.22,V.21, Bell 212A
Single-Chip Modem
DATA SHEET
REGISTER ADDRESS TABLE
ADDRESS
DATA BIT NUMBER
REGISTER
AD2 - AD0
D7
D6
D5
D4
D3
D2
D1
D0
CONTROL
MODULATION MODULATION MODULATION TRANSMIT
TRANSMIT
TRANSMIT
TRANSMIT
ANSWER/
REGISTER CR0
000
OPTION
TYPE
TYPE
MODE
MODE
MODE
ENABLE
ORIGINATE
0
1
0
2
1
0
CONTROL
REGISTER
1
CR1
DETECT
REGISTER DR
TONE
CONTROL
TR
REGISTER
QAM: 0=2400 BIT/S
DPSK: 0=1200 BIT/S
1=600 BIT/S
FSK: 0=V.23
1=V.21
TRANSMIT
001
PATTERN
1
10=QAM
00=DPSK
01=FSK
TRANSMIT
PATTERN
0
0000=PWR DOWN
0001=INT SYNCH
0010=EXT SYNCH
0011=SLAVE SYNCH
0100=ASYCH 8 BITS/CHAR
0101=ASYCH 9 BITS/CHAR
0110=ASYCH 10 BITS/CHAR
0111=ASYCH 11 BITS/CHAR
1X00=FSK
ENABLE
DETECT
INTERRUPT
BYPASS
SCRAMBLER/
ADD PH. EQ.
(V.23)
CLK
CONTROL
0=DISABLE
TXA OUTPUT
1=ENABLE
TXA OUTPUT
0=ANSWER
1=ORIGINATE
in V.23
0=BC xmit
1=MC xmit
RESET
TEST
MODE
1
TEST
MODE
0
00=TX DATA
01=TX ALTERNATE
10=TX MARK
11=TX SPACE
0=OFF
1=ON
0=NORMAL
0=XTAL
1=BYPASS
1=16 X DATA
SCRAMBLER RATE OUTPUT
AT CLK PIN IN
QAM/DPSK
MODE ONLY
0=NORMAL
1=RESET
00=NORMAL
01=ANALOG LOOPBACK
10=REMOTE DIGITAL
LOOPBACK
11=LOCAL DIGITAL
LOOPBACK
010
RECEIVE
LEVEL
INDICATOR
S1 PATTERN
DETECT
RECEIVE
DATA
UNSCR.
MARKS
DETECT
CARRIER
DETECT
SPECIAL
TONE
DETECT
CP
TONE
DETECT
SIGNAL
QUALITY
INDICATOR
0=SIGNAL
BELOW
THRESHOLD
1=ABOVE
THRESHOLD
0=NOT PRESENT
1=PATTERN
FOUND
OUTPUTS
RECEIVED
DATA STREAM
0=CONDITION NOT DETECTED
1=CONDITION DETECTED
0=GOOD
1=BAD
TRANSMIT
011
RXD
OUTPUT
CONTROL
GUARD/
CALLING/
SCT TONE
TRANSMIT
ANSWER
TONE
TRANSMIT
DTMF
DTMF3
DTMF2/
4 WIRE
FDX
DTMF1/
OVERSPEED
DTMF0/
GUARD/
ANSWER/
CALLING/SCT
RXD PIN
0=NORMAL
1=TRI-STATE
0=OFF
1=ON
0=OFF
1=ON
1=TX DTMF
4 BIT CODE FOR 1 OF 16
DUAL TONE COMBINATIONS
0=NORMAL OPERATION
1=ALLOWS V.23 FULL
DUPLEX OPERATION
GUARD: 0 - 1800 HZ
1 - 550 HZ
ANSWER: 0 - 2225 HZ
1 - 2100 HZ
CALLING: 0 - 1300 HZ
SCT:
1 - 900 HZ
CONTROL
REGISTER CR2
100
2
CONTROL
REGISTER CR3
101
3
SPECIAL
REGISTER
SR
101
ID
REGISTER
10
110
00XX=73K212AL, 322L, 321L
01XX=73K221AL, 302L
10XX=73K222AL, 222BL
1100=73K224L
1110=73K324L
1100=73K224BL
1110=73K324BL
Page: 7 of 30
MUST BE 0
SPECIAL
REGISTER
ACCESS
CALL
INITIALIZE
TRANSMIT
S1
0=ACCESS CR3
1=ACCESS
SPECIAL
REGISTER
0=DSP IN
0=NORMAL
DEMOD MODE DOTTING
1=DSP IN CALL 1=S1
PROGRESS
MODE
16 WAY
RESET
DSP
0=RX=TX
1=RX=16 WAY
0=DSP
INACTIVE
1=DSP
ACTIVE
TRAIN
INHIBIT
EQUALIZER
ENABLE
0=ADAPT EQ
ACTIVE
1=ADAPT EQ
FROZEN
0=ADAPT EQ
IN INIT
1=ADAPT EQ
OK TO ADAPT
TXDALT
ALTERNATE
TRANSMIT
DATA
SOURCE
0
TRISTATE
TX/RXCLK
0=CLOCK
DRIVEN
1=CLOCK
TRISTATE
TX BAUD
CLOCK
RECEIVE
TRANSMIT
0
GAIN
ATTEN.
BOOST
3
0=NO BOOST
1=18 dB BOOST
RX UNSCR.
DATA
0
TXD
SOURCE
TRANSMIT
ATTEN.
2
TRANSMIT
ATTEN.
1
0000-1111, SETS
TRANSMIT ATTENUATOR
16 dB RANGE
DEFAULT=0100 ³ -10 dbM0
SQ
SELECT1
SQ
SELECT0
TRANSMIT
ATTEN.
0
0
OUTPUTS
TXBAUD
CLOCK
OUTPUTS
UNSCR.
DATA
0=TXD PIN
1=TX DATA
CR3-D7
00³10 -5 BER
01³10 -6 BER
10³10 -4 BER
11³10 -3 BER
1
1
1
0
X
X
X
X
© 2005, 2008 TERIDIAN Semiconductor Corporation
Rev 7.1

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