SI3454 查看數據表（PDF） - Silicon Laboratories

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SI3454

QUAD IEEE 802.3AT POE PSE CONTROLLER

Silicon Laboratories 

Si3454

Table 3. Digital Pin Recommended Operating Conditions1

Parameter

Symbol Test Condition

Pins

Min Typ Max Unit

Input low Voltage

VIL

RESET, SCL,

SDAI, A4, A3, —

—

0.8

V

A2, A1

Input High Voltage

VIH

RESET, SCL,

SDAI, A4, A3, 2.0

—

—

V

A2, A1

RESET, SCL,

IIH

VDD = 4.2 V,

Vpin = 4.2 V

SDAI, A3, AIN,

INT, DCEN

—

—

6

µA

SHDN

—

—

10

µA

Input Leakage

IIL

VDD = 4.2 V,

Vpin = 0 V

SHDN

—

85

—

µA

RESET, SCL,

IIL

VDD = 3.3 V,

Vpin = 0 V

SDAI, A4, A3,

A2, A1, INT,

—

15

50

µA

DCEN

Output Low Voltage2

ISDAO = 8 mA,

VOL

IINT = 8 mA

IAOUT = 8 mA

—

—

0.6

V

Notes:

1. All specification voltages are referenced with respect to DGND. These specifications apply over the recommended

operating voltage and temperature ranges of the device unless noted otherwise.

2. SDAO and INT are open drain outputs. Tie each pin to VDD with a 1 k resistor for normal operation.

Rev. 1.1

9

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