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LT1187C(Rev0) 查看數據表(PDF) - Linear Technology

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LT1187C
(Rev.:Rev0)
Linear
Linear Technology Linear
LT1187C Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LT1187
APPLICATIO S I FOR ATIO
The primary use of the LT1187 is in converting high speed
differential signals to a single-ended output. The LT1187
video difference amplifier has two uncommitted high input
impedance (+) and (–) inputs. The amplifier has another
set of inputs which can be used for reference and feed-
back. Additionally, this set of inputs give gain adjust and
DC control to the difference amplifier. The voltage gain of
the LT1187 is set like a conventional operational amplifier.
Feedback is applied to pin 8, and it is optimized for gains
of 2 or greater. The amplifier can be operated single-ended
by connecting either the (+) or (–) inputs to the +/REF (pin
1). The voltage gain is set by the resistors: (RFB + RG)/RG.
Like the single-ended case, the differential voltage gain is
set by the external resistors: (RFB + RG)/RG. The maximum
input differential signal for which the output will respond
is approximately ±0.38V.
S/D
V+
VIN
35
2+
7
1
LT1187
+/REF
8 –/FB 4
V
RFB
6
VOUT
RG
AV
=
+
RFB + RG
RG
S/D
V+
VIN
35
2+
7
1
LT1187
+/REF
8 –/FB 4
V
RFB
6
VOUT
RG
AV
=
RFB +RG
RG
Power Supply Bypassing
The LT1187 is quite tolerant of power supply bypassing.
In some applications a 0.1µF ceramic disc capacitor
placed 1/2 inch from the amplifier is all that is required. In
applications requiring good settling time, it is important to
use multiple bypass capacitors. A 0.1µF ceramic disc in
parallel with a 4.7µF tantalum is recommended.
Calculating the Output Offset Voltage
Both input stages contribute to the output offset voltage at
pin 6. The feedback correction forces balance in the input
stages by introducing an Input VOS at pin 8. The complete
expression for the output offset voltage is:
VOUT = (VOS + IOS(RS) + IB(RREF)) × (RFB+RG)/RG + IB(RFB)
RS represents the input source resistance, typically 75,
and RREF represents the finite source impedance from the
DC reference voltage, for VREF grounded, RREF = 0. The
IOS is normally a small contributor and the expression
simplifies to:
VOUT = VOS(RFB+RG)/RG + IB(RFB)
If RFB is limited to 1k the last term of the equation
contributes only 2mV, since IB is less than 2µA.
7 V+
VIN DIFF
VIN
S/D
V+
35
2+
7
LT1187
1 +/REF
8 –/FB 4
V
RFB
S/D
V+
6
VOUT
VIN
VIN DIFF
RG
35
2+
7
LT1187
1 +/REF
8 –/FB 4
V
RFB
6
VOUT
RG
VO = (VIN DIFF + VIN) RFB + RG
RG
( ( VO =
RFB +RG
RG
VIN DIFF
RFB
RG
VIN
LT1187 • AI01
6
Q1 Q2
3+ 2
RE
1.1k
RS
RS
345µA
Q3 Q4
+ 1 REF
RE
1.1k
RREF
350µA
RFB
8
RG
4 V
ILT1187 • AI02
Figure 1. Simplified Input Stage Schematic
8

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