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DP8051_07 查看數據表(PDF) - Digital Core Design

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DP8051_07 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Total area
1750
330
*CPU – consisted of ALU, Opcode Decoder, Control Unit, Program &
Internal & External Memory Interfaces, User SFRs Interface
Core components area utilization in all technologies except
STRATIX II
CPU*
Component
Area
[LC]
[FFs]
1265
285
Interrupt Controller
75
40
Power Management Unit
10
5
Total area
1350
330
*CPU – consisted of ALU, Opcode Decoder, Control Unit, Program &
Internal & External Memory Interfaces, User SFRs Interface
Core components area utilization in STRATIX-II
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are trademarks of their respective owners.
http://www.DigitalCoreDesign.com
http://www.dcd.pl
Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.

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