UCN5842A 查看數據表（PDF） - Allegro MicroSystems

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UCN5842A

BiMOS II 8-BIT SERIAL-INPUT, LATCHED DRIVERS

Allegro MicroSystems 

5841 AND 5842

8-BIT SERIAL-INPUT,

LATCHED DRIVERS

CLOCK 2

SERIAL

DATA IN

3

LOGIC

GROUND 4

FUNCTIONAL BLOCK DIAGRAM

(‘A’ Package Shown)

VDD

5 LOGIC

SUPPLY

SERIAL-PARALLEL SHIFT REGISTER

6

SERIAL

DATA OUT

LATCHES

7 STROBE

8

OUTPUT ENABLE

(ACTIVE LOW)

MOS

BIPOLAR

18

17

16

15

14

13

12

11

10

OUT 1 OUT 2 OUT 3 OUT 4 OUT 5 OUT 6 OUT 7 OUT 8 K

SUB

1

POWER

GROUND

9

Dwg. FP-013-2

A5841SLW

& A5842SLW

POWER

GROUND

1

SUB

CLOCK 2 CLK

SERIAL

DATA IN

3

GROUND 4

LOGIC SUPPLY 5 VDD

SERIAL

DATA OUT

6

STROBE 7 ST

OUTPUT

ENABLE

POWER

GROUND

NO

CONNECT.

8 OE

9

SUB

10 NC

20 OUT1

19 OUT2

18 OUT 3

17 OUT4

16 OUT5

15 OUT 6

14 OUT7

13 OUT 8

12 K

NO

NC 11 CONNECT.

Dwg. PP-029-3

2.5

18-PIN DIP, RθJA = 60°C/W

2.0

20-LEAD SOIC, RθJA = 70°C/W

18-LEAD SOIC, RθJA = 80°C/W

1.5

1.0

0.5

0

25

50

75

100

125

150

AMBIENT TEMPERATURE IN °C

Dwg. GP-022-4

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

Copyright © 1985, 2000 Allegro MicroSystems, Inc.

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