DATASHEET
8PIN DIP HIGH SPEED 1M bit/s TRANSISTOR PHOTO COUPLER
6N135 6N136 EL450x series
Figure 8 Switching Time Test Circuit & Waveform
Figure 9 Transient Immunity Test Circuit & Waveform
Note:
*3 Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading
edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO >
2.0V).
Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing
edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO <
0.8V).
6
Copyright © 2010, Everlight All Rights Reserved. Release Date : May 13, 2013. Issue No:DPC-0000112 Rev.3
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