STM32L151x6/8/B, STM32L152x6/8/B
Description
2.2
Note:
2.2.1
2.2.2
2.2.3
2.2.4
Ultra-low-power device continuum
The ultra-low-power STM32L151xx and STM32L152xx are fully pin-to-pin and software
compatible. Besides the full compatibility within the family, the devices are part of
STMicroelectronics microcontrollers ultra-low-power strategy which also includes
STM8L101xx and STM8L15xx devices. The STM8L and STM32L families allow a
continuum of performance, peripherals, system architecture and features.
They are all based on STMicroelectronics ultralow leakage process.
The ultra-low-power STM32L and general-purpose STM32Fxxxx families are pin-to-pin
compatible. The STM8L15xxx devices are pin-to-pin compatible with the STM8L101xx
devices. Please refer to the STM32F and STM8L documentation for more information on
these devices.
Performance
All families incorporate highly energy-efficient cores with both Harvard architecture and
pipelined execution: advanced STM8 core for STM8L families and ARM Cortex™-M3 core
for STM32L family. In addition specific care for the design architecture has been taken to
optimize the mA/DMIPS and mA/MHz ratios.
This allows the ultra-low-power performance to range from 5 up to 33.3 DMIPs.
Shared peripherals
STM8L15xxx and STM32L15xxx share identical peripherals which ensure a very easy
migration from one family to another:
● Analog peripherals: ADC, DAC and comparators
● Digital peripherals: RTC and some communication interfaces
Common system strategy
To offer flexibility and optimize performance, the STM8L15xx and STM32L15xx families use
a common architecture:
● Same power supply range from 1.65 V to 3.6 V, (1.65 V at power down only for
STM8L15xx devices)
● Architecture optimized to reach ultralow consumption both in low power modes and
Run mode
● Fast startup strategy from low power modes
● Flexible system clock
● Ultrasafe reset: same reset strategy including power-on reset, power-down reset,
brownout reset and programmable voltage detector.
Features
ST ultra-low-power continuum also lies in feature compatibility:
● More than 10 packages with pin count from 20 to 144 pins and size down to 3 x 3 mm
● Memory density ranging from 4 to 384 Kbytes
Doc ID 17659 Rev 8
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