NDD02N60ZT4G(2010) 查看數據表（PDF） - ON Semiconductor
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NDD02N60ZT4G Datasheet PDF : 10 Pages
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100
VGS v 30 V
SINGLE PULSE
10 TC = 25°C
1
NDF02N60Z, NDP02N60Z, NDD02N60Z
TYPICAL CHARACTERISTICS
100 ms 10 ms
1 ms
10 ms
dc
100
VGS v 30 V
SINGLE PULSE
10 TC = 25°C
1
100 ms
1 ms
10 ms
dc
10 ms
0.1
0.01
0.1
1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 12. Maximum Rated Forward Biased
Safe Operating Area NDD02N60Z
1000
0.1
0.01
0.1
1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
100
1000
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 13. Maximum Rated Forward Biased
Safe Operating Area NDF02N60Z
10
50% (DUTY CYCLE)
1
20%
10%
5%
0.1 2%
1%
SINGLE PULSE
0.01
1E−06
1E−05
1E−04
1E−03
1E−02
1E−01
1E+00
1E+01
PULSE TIME (s)
Figure 14. Thermal Impedance (Junction−to−Case) for NDD02N60Z
100
RqJC = 2.2°C/W
Steady State
1E+02
1E+03
10 50% (DUTY CYCLE)
20%
10%
1 5.0%
2.0%
1.0%
0.1
0.01
1E−06
SINGLE PULSE
1E−05
1E−04
1E−03
1E−02
1E−01
1E+00
1E+01
PULSE TIME (s)
Figure 15. Thermal Impedance (Junction−to−Ambient) for NDD02N60Z
RqJA = 41°C/W
Steady State
1E+02 1E+03
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