LTC2314-14 查看數據表（PDF） - Linear Technology
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LTC2314-14 Datasheet PDF : 20 Pages
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LTC2314-14
Applications Information
CS
SCK
t3
SDO
t10
tCONV = 15.5 • tSCK + t2 + t10
t2
t6
tCONV
1
2
3
4
14
15
16
t5
0
B13* B12
t4 t7
B11
B0
0
(MSB)
tTHROUGHPUT
tACQ-MIN = 40ns
tACQ-MIN
t9
HI-Z STATE
*NOTE: SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
Figure 5: LTC2314-14 Serial Interface Timing Diagram (SCK Low During tACQ)
231414 F05
CS
tCONV(MIN) = 15 • tSCK + t2 + t10
tCONV
t2
t6
SCK
1
2
3
4
5
t10
15
16
tACQ-MIN = 40ns
tACQ-MIN
t5
t3
t4 t7
t9
SDO
00
B13* B12
B11
B1
B0 0
HI-Z STATE
(MSB)
tTHROUGHPUT
*NOTE: SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
231414 TD06
Figure 6: LTC2314-14 Serial Interface Timing Diagram (SCK High During tACQ)
CS
tCONV = 16 • tSCK
tCONV
t2
t6
t10
tACQ = 4 • tSCK
tACQ
SCK
20
1
2
3
4
5
t5
t3
t4 t7
15
16
17
18
19
t9
SDO
00
B13* B12
B11
B1
B0 0
(MSB)
tTHROUGHPUT = 20 • tSCK
HI-Z STATE
*NOTE: SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
Figure 7: LTC2314-14 Serial Interface Timing Diagram (SCK Continuous)
20
231414 TD07
Serial Data Output (SDO)
The SDO output is always forced into the high impedance
state while CS is high. The falling edge of CS starts the
conversion and enables SDO. The A/D conversion result
is shifted out on the SDO pin as a serial data stream with
the MSB first. The data stream consists of either one
leading zero (SCK held low during acquisition, Fig. 5) or
two leading zeros (SCK held high during acquisition, Fig.
6) followed by 14 bits of conversion data. There is 1 cycle
of conversion latency. Subsequent falling SCK edges after
the LSB is output will output zeros on the SDO pin. The
SDO output returns to the high impedance state after the
16th falling edge of SCK.
231414f
For more information www.linear.com/2314-14
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