MC100LVE222
ORDERING INFORMATION
Device
Package
Shipping†
MC100LVE222FA
LQFP−52
160 Units / Rail
MC100LVE222FAR2
LQFP−52
1500 / Tape & Reel
MC100LVE222FAG
LQFP−52
(Pb−Free)
160 Units / Rail
MC100LVE222FAR2G
LQFP−52
(Pb−Free)
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1404
AN1405
− ECLinPS Circuit Performance at Non−Standard VIH Levels
− ECL Clock Distribution Techniques
AN1406
− Designing with PECL (ECL at +5.0 V)
AN1503
− ECLinPS I/O SPICE Modeling Kit
AN1504
− Metastability and the ECLinPS Family
AN1560
− Low Voltage ECLinPS SPICE Modeling Kit
AN1568
− Interfacing Between LVDS and ECL
AN1596
− ECLinPS Lite Translator ELT Family SPICE I/O Model Kit
AN1650
− Using Wire−OR Ties in ECLinPS Designs
AN1672
− The ECL Translator Guide
AND8001
− Odd Number Counters Design
AND8002
− Marking and Date Codes
AND8020
− Termination of ECL Logic Devices
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