FM24CL04 查看數據表（PDF） - Ramtron International Corporation

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FM24CL04

4Kb FRAM Serial Memory

Ramtron International Corporation 

FM24CL04

Diagram Notes

All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read

and write cycles. Write timing parameters apply to slave address, word address, and write data bits. Functional

relationships are illustrated in the relevant data sheet sections. These diagrams illustrate the timing parameters only.

Read Bus Timing

Write Bus Timing

Data Retention (VDD = 2.7V to 3.65V, +85°C)

Parameter

Min

Data Retention

45

Units

Years

Notes

Rev. 3.0

March 2005

Page 10 of 11

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