PCF85176H_10 查看數據表（PDF） - NXP Semiconductors.

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PCF85176H_10

Universal LCD driver for low multiplex rates

NXP Semiconductors. 

NXP Semiconductors

PCF85176

Universal LCD driver for low multiplex rates

7. Functional description

The PCF85176 is a versatile peripheral device designed to interface any

microprocessor or microcontroller with a wide variety of LCDs. It can directly drive any

static or multiplexed LCD containing up to four backplanes and up to 40 segments.

The possible display configurations of the PCF85176 depend on the number of active

backplane outputs required. A selection of display configurations is shown in Table 4. All

of these configurations can be implemented in the typical system shown in Figure 4.

Table 4. Display configurations

Number of:

7-segment alphanumeric

Backplanes Elements Digits Indicator symbols

4

160

20

20

3

120

15

15

2

80

10

10

1

40

5

5

14-segment alphanumeric

Characters Indicator symbols

10

20

8

8

5

10

2

12

Dot matrix

160 dots (4 × 40)

120 dots (3 × 40)

80 dots (2 × 40)

40 dots (1 × 40)

VDD

R

≤

tr

2CB

HOST

MICRO-

PROCESSOR/

MICRO-

CONTROLLER

SDA

SCL

OSC

VDD VLCD

40 segment drives

PCF85176

4 backplanes

LCD PANEL

(up to 160

elements)

A0 A1 A2 SA0 VSS

VSS

013aaa071

The resistance of the power lines must be kept to a minimum.

Fig 4. Typical system configuration

The host microprocessor or microcontroller maintains the 2-line I2C-bus communication

channel with the PCF85176. The internal oscillator is enabled by connecting

pin OSC to pin VSS. The appropriate biasing voltages for the multiplexed LCD waveforms

are generated internally. The only other connections required to complete the system are

the power supplies (VDD, VSS, and VLCD) and the LCD panel chosen for the application.

7.1 Power-On Reset (POR)

At power-on the PCF85176 resets to the following starting conditions:

• All backplane and segment outputs are set to VLCD

• The selected drive mode is: 1:4 multiplex with 1⁄3 bias

• Blinking is switched off

• Input and output bank selectors are reset

• The I2C-bus interface is initialized

• The data pointer and the subaddress counter are cleared (set to logic 0)

PCF85176_1

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 01 — 14 April 2010

© NXP B.V. 2010. All rights reserved.

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