73K321L 查看數據表（PDF） - TDK Corporation

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73K321L

CCITT V.23, V.21 Single-Chip Modem

TDK Corporation 

73K321L

CCITT V.23, V.21

Single-Chip

DESCRIPTION (continued)

The 73K321L is ideal for either free standing or

integral system modem applications where multi-

standard data communications over the 2-wire

switched telephone network is desired. Typical uses

include videotex terminals, low-cost integral modems

and built-in diagnostics for office automation or

industrial control systems. The 73K321L’s high

functionality, low power consumption and efficient

packaging simplify design requirements and increase

system reliability in these applications. A complete

modem requires only the addition of the phone line

interface, a control microprocessor, and RS-232 level

converter for a typical system. The 73K321L is part of

TDK Semiconductor's K-Series family of pin and

function compatible single-chip modem products.

These devices allow systems to be configured for

higher speeds and Bell or CCITT operation with only

a single component change.

OPERATION

FSK MODULATOR/DEMODULATOR

The FSK modulator produces a frequency

modulated analog output signal using two discrete

frequencies to represent the binary data. V.21 mode

uses 980 and 1180 Hz (originate, mark and space)

or 1650 and 1850 Hz (answer, mark and space).

V.23 mode uses 1300 and 2100 Hz for the main

channel and 390 and 450 Hz for the back channel.

The modulation rate of the back channel is up to 75

baud. Demodulation involves detecting the received

frequencies and decoding them into the appropriate

binary value.

PASSBAND FILTERS AND EQUALIZERS

High and low band filters are included to shape the

amplitude and phase response of the transmit and

receive signals and provide compromise delay

equalization and rejection of out-of-band signals in the

receive channel. Amplitude and phase equalization

are necessary to compensate for distortion of the

transmission line and to reduce intersymbol

interference in the bandlimited receive signal.

AGC

The automatic gain control maintains a signal level

at the input to the demodulators which is constant to

within 1 dB. It corrects quickly for increases in signal

which would cause clipping and provides a total

receiver dynamic range of >45 dB.

PARALLEL BUS INTERFACE

Four 8-bit registers are provided for control, option

select and status monitoring. These registers are

addressed with the AD0, AD1, and AD2 multiplexed

address lines (latched by ALE) and appear to a

control microprocessor as four consecutive memory

locations. Two control registers and the tone register

are read/write memory. The detect register is read

only and cannot be modified except by modem

response to monitored parameters.

SERIAL CONTROL INTERFACE

The Serial Command mode allows access to the

73K321L control and status registers via a serial

command port. In this mode the AD0, AD1 and AD2

lines provide register addresses for data passed

through the data pin under control of the RD and

WR lines. A read operation is initiated when the RD

line is taken low. The first bit is available after RD is

brought low and the next seven cycles of EXCLK will

then transfer out seven bits of the selected address

location LSB first. A write takes place by shifting in

eight bits of data LSB first for eight consecutive

cycles of EXCLK. WR is then pulsed low and data

transferred into the selected register occurs on the

rising edge of WR.

SPECIAL DETECT CIRCUITRY

The special detect circuitry monitors the received

analog signal to determine status or presence of

carrier, answer tone and weak received signal (long

loop condition). Special tones such as FSK marking

and the 1300 Hz calling tone are also detected. A

highly frequency selective call progress detector

provides adequate discrimination to accurately

detect European call progress signals.

DTMF GENERATOR

The DTMF generator will output one of 16 standard

tone-pairs determined by a 4-bit binary value and TX

DTMF mode bit previously loaded into the tone

register. Dialing is initiated when the DTMF mode is

selected using the tone register and the transmit

enable (CR0 bit D1) is changed from 0 to 1.

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