BUK106-50L 查看數據表（PDF） - Philips Electronics
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BUK106-50L Datasheet PDF : 14 Pages
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Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK106-50L/S
BUK106-50LP/SP
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL PARAMETER
CONDITIONS
MIN. MAX. UNIT
IDRRM
EDSM
EDRM
Repetitive peak clamping drain current RIS ≥ 100 Ω1
Non-repetitive inductive turn-off
energy2
IDM = 27 A; RIS ≥ 100 Ω
Repetitive inductive turn-off energy
RIS ≥ 100 Ω; Tmb ≤ 85 ˚C;
IDM = 16 A; VDD ≤ 20 V;
f = 250 Hz
-
50
A
-
1
J
-
80
mJ
IDIRM
Repetitive peak drain to input current3 RIS = 0 Ω; tp ≤ 1 ms
-
50
mA
REVERSE DIODE LIMITING VALUE
SYMBOL PARAMETER
IS
Continuous forward current
CONDITIONS
Tmb = 25 ˚C;
VIS = VPS = VFS = 0 V
MIN.
-
MAX.
50
UNIT
A
THERMAL CHARACTERISTICS
SYMBOL PARAMETER
Thermal resistance
Rth j-mb
Rth j-a
Junction to mounting base
Junction to ambient
CONDITIONS
-
in free air
MIN. TYP. MAX. UNIT
-
0.8 1.0 K/W
-
60
- K/W
STATIC CHARACTERISTICS
Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
V(CL)DSR
V(CL)DSR
IDSS
IDSR
IDSR
Drain-source clamping voltage
Drain-source clamping voltage
Zero input voltage drain current
Drain source leakage current
Drain source leakage current
RIS = 100 Ω; ID = 10 mA
RIS = 100 Ω; IDM = 1 A; tp ≤ 300 µs;
δ ≤ 0.01
VDS = 12 V; VIS = 0 V
VDS = 50 V; RIS = 100 Ω;
VDS = 40 V; RIS = 100 Ω;
Tj = 125 ˚C
RDS(ON)
Drain-source on-state
resistance
IDM = 25 A;
tp ≤ 300 µs; δ ≤ 0.01
VIS = 8 V
VIS = 5 V
MIN.
50
50
TYP.
-
-
MAX.
65
70
UNIT
V
V
-
0.5 10 µA
-
1
20 µA
-
10 100 µA
-
22 28 mΩ
-
28 35 mΩ
1 The input pin must be connected to the source pin by a specified external resistance to allow the power MOSFET gate source voltage to
become sufficiently positive for active clamping. Refer to INPUT CHARACTERISTICS.
2 While the protection supply voltage is connected, during overvoltage clamping it is possible that the overload protection may operate at
energies close to the limiting value. Refer to OVERLOAD PROTECTION CHARACTERISTICS.
3 Shorting the input to source with low resistance inhibits the internal overvoltage protection by preventing the power MOSFET gate source
voltage becoming positive.
February 1993
3
Rev 1.200
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