BUK106-50L 查看數據表（PDF） - Philips Electronics
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BUK106-50L Datasheet PDF : 14 Pages
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Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK106-50L/S
BUK106-50LP/SP
INPUT CHARACTERISTICS
Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
Normal operation
VIS(TO)
Input threshold voltage
IIS
V(CL)IS
RISL
Input current
Input clamp voltage
Overload protection latched
Input resistance1
Application information
External input resistances for
RIS
internal overvoltage clamping2
RI
internal overload protection3
CONDITIONS
VDS = 5 V; ID = 1 mA
Tmb = 150 ˚C
VIS = 10 V
II = 1 mA
VPS = 5 V
VPS = 10 V
(see figure 29)
RI = ∞ Ω;
RIS = ∞ Ω;
II = 5 mA;
Tmb = 150 ˚C
II = 5 mA;
Tmb = 150 ˚C
VDS > 30 V
VII = 5 V
VII = 10 V
MIN. TYP. MAX. UNIT
1.0 1.5 2.0 V
0.5
-
-
V
-
10 100 nA
11 13
-
V
-
55
-
Ω
-
95
-
Ω
-
35
-
Ω
-
60
-
Ω
100 -
1
-
2
-
-
Ω
-
kΩ
-
kΩ
SWITCHING CHARACTERISTICS
Tmb = 25 ˚C; RI = 50 Ω; RIS = 50 Ω (see figure 29); resistive load RL = 10 Ω. For waveforms see figure 28.
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX.
td on
Turn-on delay time
tr
Rise time
td off
Turn-off delay time
tf
Fall time
VDD = 15 V; VIS: 0 V ⇒ 10 V
VDD = 15 V; VIS: 10 V ⇒ 0 V
-
10
-
-
35
-
- 280 -
- 120 -
UNIT
ns
ns
ns
ns
CAPACITANCES
Tmb = 25 ˚C; f = 1 MHz
SYMBOL PARAMETER
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer capacitance
Cpso
Protection supply pin
capacitance
Cfso
Flag pin capacitance
CONDITIONS
VDS = 25 V; VIS = 0 V
VDS = 25 V; VIS = 0 V
VDS = 25 V; VIS = 0 V
VPS = 10 V
VFS = 10 V; VPS = 0 V
MIN.
-
-
-
-
TYP.
1250
650
150
30
MAX.
1800
1000
250
-
UNIT
pF
pF
pF
pF
-
20
-
pF
1 The resistance of the internal transistor which discharges the power MOSFET gate capacitance when overload protection operates.
The external drive circuit should be such that the input voltage does not exceed VIS(TO) minimum when the overload protection has
operated. Refer also to figure for latched input characteristics.
2 Applications using a lower value for RIS would require external overvoltage protection.
3 For applications requiring a lower value for RI, an external overload protection strategy is possible using the flag pin to ‘tell’ the control circuit to
switch off the input.
February 1993
5
Rev 1.200
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