BR24C01A-W 查看數據表（PDF） - ROHM Semiconductor
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BR24C01A-W Datasheet PDF : 13 Pages
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Memory ICs
BR24C01A-W / BR24C01AF-W / BR24C01AFJ-W / BR24C01AFV-W / BR24C02-W / BR24C02F-W /
BR24C02FJ-W / BR24C02FV-W / BR24C04-W / BR24C04F-W / BR24C04FJ-W / BR24C04FV-W
BR24C02-W / F-W / FJ-W / FV-W
S
W
T
R
A
I
R
SLAVE
T
T
ADDRESS
E
SDA
LINE
1 0 1 0 A2 A1 A0
WA
7
WORD
ADDRESS
WA
0
D7
DATA
S
T
O
P
D0
RA
A
A
/C
C
C
WK
K
K
WP
Fig.5
BR24C04-W / F-W / FJ-W / FV-W
S
W
T
R
A
I
R
SLAVE
T
T
ADDRESS
E
SDA
LINE
1 0 1 0 A2 A1 PS
WA
7
WORD
ADDRESS
WA
0
D7
RA
A
/C
C
WK
K
WP
DATA
S
T
O
P
D0
A
C
K
Fig.6
• Data is written to the address designated by the word address (n address).
• After eight bits of data are input, the data is written to the memory cell by issuing the stop bit.
(8) Page write cycle
BR24C01A-W / AF-W / AFJ-W / AFV-W
S
W
T
R
A
I
R
SLAVE
T
T
ADDRESS E
WORD
ADDRESS(n)
DATA(n)
SDA
LINE
1 0 1 0 A2 A1 A0
∗
WA
6
WA
0
D7
D0
S
T
DATA(n+7)
O
P
D0
RA
A
A
A
/C
C
C
C
WK
K
K
K
WP
Fig.7
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