N80L186EB13 查看數據表（PDF） - Intel
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N80L186EB13 Datasheet PDF : 59 Pages
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80C186EB 80C188EB 80L186EB 80L188EB
AC SPECIFICATIONS
AC Characteristics 80C186EB20 80C186EB13 (Continued)
Symbol
Parameter
20 MHz
13 MHz
Min Max Min Max
SYNCHRONOUS INPUTS
TCHIS
TEST NMI INT4 0 BCLK1 0 T1 0IN
10
10
READY CTS1 0 P2 6 P2 7
TCHIH
TEST NMI INT4 0 BCLK1 0 T1 0IN
3
3
READY CTS1 0
TCLIS
TCLIH
TCLIS
TCLIH
AD15 0 (AD7 0) READY
READY AD15 0 (AD7 0)
HOLD PEREQ ERROR
HOLD PEREQ ERROR
10
10
3
3
10
10
3
3
NOTES
1 See AC Timing Waveforms for waveforms and definition
2 Measure at VIH for high time VIL for low time
3 Only required to guarantee ICC Maximum limits are bounded by TC TCH and TCL
4 Specified for a 50 pF load see Figure 13 for capacitive derating information
5 Specified for a 50 pF load see Figure 14 for rise and fall times outside 50 pF
6 See Figure 14 for rise and fall times
7 TCHOV1 applies to BHE (RFSH) LOCK and A19 16 only after a HOLD release
8 TCHOV2 applies to RD and WR only after a HOLD release
9 Setup and Hold are required to guarantee recognition
10 Setup and Hold are required for proper operation
Units
ns
ns
ns
ns
ns
ns
Notes
19
19
1 10
1 10
19
19
31
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