N80L186EB13 查看數據表（PDF） - Intel

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N80L186EB13

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

Intel 

80C186EB 80C188EB 80L186EB 80L188EB

AC SPECIFICATIONS (Continued)

Serial Port Mode 0 Timings (80C186EB25 20 13 80L186EB16 13 8)

Symbol

Parameter

Min

Max

Unit Notes

TXLXL TXD Clock Period

T (n a 1)

ns 1 2

TXLXH TXD Clock Low to Clock High (n l 1)

2T b 35

2T a 35 ns 1

TXLXH TXD Clock Low to Clock High (n e 1)

T b 35

T a 35

ns 1

TXHXL TXD Clock High to Clock Low (n l 1)

(n b 1) T b 35 (n b 1) T a 35 ns 1 2

TXHXL TXD Clock High to Clock Low (n e 1)

T b 35

T a 35

ns 1

TQVXH RXD Output Data Setup to TXD Clock High (n l 1) (n b 1) T b 35

ns 1 2

TQVXH RXD Output Data Setup to TXD Clock High (n e 1)

T b 35

ns 1

TXHQX RXD Output Data Hold after TXD Clock High (n l 1) 2T b 35

ns 1

TXHQX RXD Output Data Hold after TXD Clock High (n e 1) T b 35

ns 1

TXHQZ RXD Output Data Float after Last TXD Clock High

T a 20

ns 1

TDVXH RXD Input Data Setup to TXD Clock High

T a 20

ns 1

TXHDX RXD Input Data Hold after TXD Clock High

0

ns 1

NOTES

1 See Figure 12 for waveforms

2 n is the value of the BxCMP register ignoring the ICLK Bit (i e ICLK e 0)

37

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