74LV175 查看數據表（PDF） - Philips Electronics
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74LV175 Datasheet PDF : 13 Pages
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Philips Semiconductors
Quad D-type flip-flop with reset; positive-edge trigger
Product specification
74LV175
AC CHARACTERISTICS
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KW
SYMBOL
PARAMETER
WAVEFORM
CONDITION
VCC(V)
1.2
tPHL/tPLH
Propagation delay
CP to Qn, Qn
Figures 1
2.0
2.7
3.0 to 3.6
1.2
tPHL/tPLH
Propagation delay
MR to Qn, Qn
Figures 2
2.0
2.7
3.0 to 3.6
tw
Clock pulse width
HIGH or LOW
Figures 1
2.0
2.7
3.0 to 3.6
tw
Master reset pulse
width LOW
Figures 2
2.0
2.7
3.0 to 3.6
1.2
trem
Removal time
MR to CP
Figures 2
2.0
2.7
3.0 to 3.6
1.2
tsu
Set-up time
Dn to CP
Figures 3
2.0
2.7
3.0 to 3.6
1.2
th
Hold time
Dn to CP
Figures 3
2.0
2.7
3.0 to 3.6
fmax
Maximum clock
pulse frequency
Figures 1
2.0
2.7
3.0 to 3.6
NOTES:
1. Unless otherwise stated, all typical values are measured at Tamb = 25°C.
2. Typical values are measured at VCC = 3.3 V.
LIMITS
–40 to +85 °C
MIN TYP1 MAX
–40 to +125 °C
MIN MAX
100
34
65
77
25
48
56
192
38
45
90
31
58
70
23
43
51
172
34
41
34
14
41
25
10
30
20
82
24
34
14
41
25
9
30
20
72
24
–60
5
–20
5
5
–15
5
5
–122
5
5
22
2
26
16
2
19
13
12
15
–5
5
–1
5
5
0
5
5
02
5
14
40
12
19
58
16
24
702
20
UNIT
ns
ns
ns
ns
ns
ns
ns
MHz
1998 May 20
6
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