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PIC12CE518-04-JW_97 查看數據表(PDF) - Microchip Technology

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PIC12CE518-04-JW_97
Microchip
Microchip Technology Microchip
PIC12CE518-04-JW_97 Datasheet PDF : 88 Pages
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PIC12CE5XX
TABLE 3-1: PIC12CE5XX PINOUT DESCRIPTION
Name
DIP SOIC I/O/P Buffer
Pin # Pin # Type Type
Description
GP0
7
7
I/O TTL/ST Bi-directional I/O port/ serial programming data. Can
be software programmed for internal weak pull-up and
wake-up from SLEEP on pin change. This buffer is a
Schmitt Trigger input when used in serial programming
mode.
GP1
6
6
I/O TTL/ST Bi-directional I/O port/ serial programming clock. Can
be software programmed for internal weak pull-up and
wake-up from SLEEP on pin change. This buffer is a
Schmitt Trigger input when used in serial programming
mode.
GP2/T0CKI
5
5
I/O
ST Bi-directional I/O port. Can be configured as T0CKI.
GP3/MCLR/VPP
4
4
I
TTL Input port/master clear (reset) input/programming volt-
age input. When configured as MCLR, this pin is an
active low reset to the device. Voltage on MCLR/VPP
must not exceed VDD during normal device operation.
Can be software programmed for internal weak pull-up
and wake-up from SLEEP on pin change. Weak pull-
up always on if configured as MCLR
GP4/OSC2
3
3
I/O
TTL Bi-directional I/O port/oscillator crystal output. Con-
nections to crystal or resonator in crystal oscillator
mode (XT and LP modes only, GPIO in other modes).
GP5/OSC1/CLKIN
2
2
I/O TTL/ST Bidirectional IO port/oscillator crystal input/external
clock source input (GPIO in Internal RC mode only,
OSC1 in all other oscillator modes). TTL input when
GPIO, ST input in external RC oscillator mode.
VDD
1
1
P
— Positive supply for logic and I/O pins
VSS
8
8
P
— Ground reference for logic and I/O pins
Legend: I = input, O = output, I/O = input/output, P = power, — = not used, TTL = TTL input,
ST = Schmitt Trigger input
© 1997 Microchip Technology Inc.
Preliminary
DS40172A-page 9

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