MC74HC4020A_14 查看數據表（PDF） - ON Semiconductor

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MC74HC4020A_14

14-Stage Binary Ripple Counter

ON Semiconductor 

MC74HC4020A

PIN DESCRIPTIONS

INPUTS

Clock (Pin 10)

Negative−edge triggering clock input. A high−to−low

transition on this input advances the state of the counter.

Reset (Pin 11)

Active−high reset. A high level applied to this input

asynchronously resets the counter to its zero state, thus

forcing all Q outputs low.

OUTPUTS

Q1, Q4—Q14 (Pins 9, 7, 5, 4, 6, 13, 12, 14, 15, 1, 2, 3)

Active−high outputs. Each Qn output divides the Clock

input frequency by 2N.

SWITCHING WAVEFORMS

tf

tr

90%

VCC

Clock

50%

10%

GND

tw

1/fMAX

tPLH

tPHL

90%

Q1 50%

10%

tTLH

tTHL

Clock

Reset

Any Q

VCC

50%

GND

trec

tw

VCC

50%

GND

tPHL

50%

Figure 2.

Figure 3.

Qn

50%

tPLH

VCC

GND

tPHL

Qn+1

50%

Figure 4.

DEVICE

UNDER

TEST

TEST

POINT

OUTPUT

CL*

*Includes all probe and jig capacitance

Figure 5. Test Circuit

http://onsemi.com

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