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DS1340-18_03 查看數據表(PDF) - Dallas Semiconductor -> Maxim Integrated

零件编号
产品描述 (功能)
生产厂家
DS1340-18_03
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS1340-18_03 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2-Wire RTC with Trickle Charger
LOCAL GROUND PLANE (LAYER 2)
X1
CRYSTAL
X2
GND
Figure 4. Layout Example
temperature shifts. External circuit noise coupled into
the oscillator circuit can result in the clock running fast.
Figure 4 shows a typical PC board layout for isolating
the crystal and oscillator from noise. Refer to
Application Note 58: Crystal Considerations with Dallas
Real-Time Clocks (www.maxim-ic.com/RTCapps) for
detailed information.
Operation
The DS1340 operates as a slave device on the serial
bus. Access is obtained by implementing a START
condition and providing a device identification code fol-
lowed by data. Subsequent registers can be accessed
sequentially until a STOP condition is executed. The
device is fully accessible and data can be written and
X1
OSCILLATOR
X2
VCC
VBACKUP
POWER
CONTROL
SCL SERIAL BUS
SDA
INTERFACE
AND ADDRESS
REGISTER
32,768Hz
512Hz
FT/OUT
MUX/BUFFER
DIVIDER AND
CALIBRATION
CIRCUIT
CONTROL
LOGIC
1Hz CLOCK AND
CALENDAR
REGISTERS
USER BUFFER
(7 BYTES)
DS1340
Figure 5. Functional Diagram
read when VCC is greater than VPF. However, when
VCC falls below VPF, the internal clock registers are
blocked from any access. If VPF is less than VBACKUP,
the device power is switched from VCC to VBACKUP
when VCC drops below VPF. If VPF is greater than
VBACKUP, the device power is switched from VCC to
VBACKUP when VCC drops below VBACKUP. The regis-
ters are maintained from the VBACKUP source until VCC
is returned to nominal levels. The functional diagram
(Figure 5) shows the main elements of the serial RTC.
Address Map
Table 2 shows the DS1340 address map. The RTC reg-
isters are located in address locations 00h to 06h, and
Table 2. Address Map
ADDRESS
00H
01H
BIT 7
EOSC
X
BIT 6
BIT 5 BIT 4
10 Seconds
10 Minutes
BIT 3
02H
CEB
CB
10 Hours
03H
X
X
X
X
X
04H
X
X
10 Date
05H
X
X
X
10 Month
06H
10 Year
07H
OUT
FT
S
CAL4 CAL3
BIT 2
BIT 1
Seconds
Minutes
Hours
Day
Date
Month
Year
CAL2
CAL1
BIT 0
CAL0
FUNCTION
Seconds
Minutes
Century/
Hours
Day
Date
Month
Year
Control
RANGE
00–59
00–59
0–1; 00–23
01–07
01–31
01–12
00–99
08H
TCS3 TCS2 TCS1 TCS0 DS1
DS0
ROUT1 ROUT0
Trickle
Charger
09H
OSF
0
0
0
0
0
0
0
Flag
X = Read/Write bit
Note: Unless otherwise specified, the state of the registers is not defined when power is first applied.
_____________________________________________________________________ 7

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