R3130N×××A/C, R3131N×××A/C
TIMING CHART
Detector
Supply
Voltage
(VDD)
Threshold
VDET
Minimum Operating
Voltage VSS
Supply
Voltage
(VDD)
Detector
Threshold
VDET
Minimum Operating
Voltage
VSS
Output Voltage
VSS
Tdelay
R3130N Operation Diagram
Output Voltage
VSS
Tdelay
R3131N Operation Diagram
• Output Delay Operation
Output Delay Time, or Tdelay is specified as follows:
1. In the case of Nch Open Drain Output:
The time interval from rising edge of VDD pulse (1.0V→(VDET)+0.1V) to the time at which the output reaches
2.5V under the condition that the output pin (OUT) is pulled up to 5V through a 470kΩ resistor.
2. In the case of CMOS Output
The time interval from rising edge of VDD pulse (1.0V→(VDET)+0.1V) to the time at which the output reaches
VDD/2.
VDET+1.0V
Input Voltage
(VDD)
VDET+1.0V
Input Voltage
(VDD)
1.0V
GND
1.0V
GND
5.0V
Output Voltage 2.5V
GND
Trst Tdelay
Nch Open Drain Output
VDET+0.1V
Output Voltage
(VDET+0.1V)/2
GND
Trst
CMOS Output
Tdelay
3