LC73881M 查看數據表（PDF） - SANYO -> Panasonic

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LC73881M

DTMF Receiver LSI

SANYO -> Panasonic 

LC73881M

When the data output is disrupted due to input clock displacement.

Data is output from the SD pin after 4 pulses are input to the ACK pin. However, note that if 5 or more pulses are input

between one rising edge on the EST pin and the next rising edge on the EST pin, the fifth and later pulses will be

ignored.

ACK/SD Timing Chart

Reset Timing at Power On

Filter Characteristics

> 1 µs

No. 5000-5/6

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