74HCT139(2015) 查看數據表（PDF） - NXP Semiconductors.

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74HCT139
(Rev.:2015)

Dual 2-to-4 line decoder/demultiplexer

NXP Semiconductors. 

Nexperia

74HC139; 74HCT139

Dual 2-to-4 line decoder/demultiplexer

$

$

(

Fig 4. Logic diagram (one decoder/demultiplexer)

5. Pinning information

5.1 Pinning

<

<

<

<

DDD

( 

$ 

 9&&

 (

$ 

< 

< 

 $

 $



 <

< 

 <

< 

*1' 

 <

 <

DDG

Fig 5. Pin configuration SO16, SSOP16 and TSSOP16

5.2 Pin description

Table 2. Pin description

Symbol

1E, 2E

1A0, 1A1

1Y0, 1Y1, 1Y2, 1Y3

GND

2Y0, 2Y1, 2Y2, 2Y3

2A0, 2A1

VCC

Pin

1, 15

2, 3

4, 5, 6, 7

8

12, 11, 10, 9

14, 13

16

Description

enable input (active LOW)

address input

output (active LOW)

ground (0 V)

output (active LOW)

address input

positive supply voltage

74HC_HCT139

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 11 December 2015

© Nexperia B.V. 2017. All rights reserved

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