GMS97C1051/L1051
8-Bit CMOS Microcontroller
Table 3. SFR lists and their addresses
Symbol
* ACC
*B
DPH
DPL
* PSW
SP
* IE
* IP
* P1
* P3
* TCON
TH0
TL0
* TMOD
Name
Address
Accumulator
E0H
B Register
F0H
Data Pointer High Byte
83H
Data Pointer Low Byte
82H
Program Status Word
D0H
Stack Pointer
81H
Interrupt Enable Control
A8H
Interrupt Priority Control
B8H
Port 1
90H
Port 3
B0H
Timer/Counter Control
88H
Timer/Counter 0 High Bytes
8CH
Timer/Counter 0 Low Bytes
8AH
Timer/Counter Mode Control
89H
* = Bit addressable SFR
Timer/Counter 0
The GMS97C1051/L1051 has one 16-bit Timer/
Counter register : Timer0 . As a Timer, the register
is incremented every machine cycle. Thus, the
register counts machine cycle. Since a machine
cycle consists of 12 oscillator periods, the count
rate is 1/12 of the oscillator frequency. As a
counter, the register is incremented in response to
a 1-to-0 transition at its corresponding external
input pin P3.4/T0. Since 2 machine cycles are
required to recognize a 1-to-0 transition, the
maximum count rate is 1/24 of the oscillator fre-
quency. External inputs P3.2/INT0 and 3.3/INT1
can be programmed to function as a gate to facili-
tate pulse width measurements. Timer/Counter 0
can be used in four operating modes as listed in
Table 4. Figure 3 illustrates the input clock logic.
Table 4. Timer / Counter 0 Operating Modes
Mode
Description
TMOD
Gate C/T
M1
M0
0 8-bit Timer/Counter with 5-bit prescaler
×
×
0
0
1 16-bit timer/counter
×
×
0
1
2 8-bit Auto-Reload Timer/Counter
×
×
1
0
3 (Timer 0) TL0 is an 8-bit Timer/Counter controlled by the ×
×
1
1
standard Timer 0 control bits, TH0 is an 8-bit Timer
Hynix semiconductor
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