73S8010R-ILR/F 查看數據表（PDF） - Teridian Semiconductor Corporation
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73S8010R-ILR/F Datasheet PDF : 24 Pages
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73S8010R
Low Cost Smart Card Interface
DATA SHEET
PIN DESCRIPTION
CARD INTERFACE
NAME
I/O
AUX1
AUX2
RST
CLK
PRES
VCC
GND
PIN
(SO)
11
13
12
16
15
10
17
14
PIN
(QFN)
8
11
10
14
13
7
15
12
DESCRIPTION
Card I/O: Data signal to/from card. Includes a pull-up resistor to VCC.
AUX1: Auxiliary data signal to/from card. Includes a pull-up resistor to VCC.
AUX2: Auxiliary data signal to/from card. Includes a pull-up resistor to VCC.
Card reset: provides reset (RST) signal to card.
Card clock: provides clock (CLK) signal to card. The rate of this clock is determined by crystal
oscillator frequency and CLKSEL bits in the control register.
Card Presence switch: active high indicates card is present. Includes a pull-down resistor.
Card power supply – logically controlled by sequencer, output of LDO regulator. Requires an
external filter capacitor to the card GND.
Card ground.
MISCELLANEOUS INPUTS AND OUTPUTS
NAME
PIN
(SO)
PIN
(QFN)
DESCRIPTION
XTALIN
24
23
XTALOUT
25
24
VDDF_ADJ
NC
18
7, 8, 9
17
4, 5, 6,
9, 16,
25, 32
Crystal oscillator input: can either be connected to crystal or driven as a source for the card clock.
Crystal oscillator output: connected to crystal. Left open if XTALIN is being used as external
clock input.
VDD threshold adjustment input: this pin can be used to overwrite higher VDDF value (that controls
deactivation of the card). Must be left open if unused.
Non-connected pin.
POWER SUPPLY AND GROUND
NAME
PIN
(SO)
PIN
(QFN)
DESCRIPTION
VDD
VPC
GND
GND
GND
21
20
System controller interface supply voltage and supply voltage for internal circuitry.
6
3
LDO regulator power supply source.
4
1
LDO regulator ground.
14
12
Smart Card I/O Ground.
5, 22
2,21
Digital ground.
Page: 3 of 24
© 2005-2008 TERIDIAN Semiconductor Corporation
Rev 1.5
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