73S8010R-IM/F 查看數據表（PDF） - Teridian Semiconductor Corporation
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73S8010R-IM/F Datasheet PDF : 24 Pages
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73S8010R
Low Cost Smart Card Interface
DATA SHEET
CARD POWER SUPPLY
The card power supply is provided by the LDO regulator, and controlled by the digital ISO-7816-3 sequencer.
Card voltage selection is carried out by bit 2 of the control register.
Choice of the VCC capacitor:
Depending on the applications, the requirements in terms of both VCC minimum voltage and transient currents that
the interface must be able to provide to the card are different. An external capacitor must be connected between
the VCC pin and to the card ground in order to guarantee stability of the LDO regulator, and to handle the
transient requirements. The type and value of this capacitor can be optimized to meet the desired specification.
The table below shows the recommended capacitors for each VPC power supply configuration and applicable
specification.
Specification Requirements
Specification
Min VCC Voltage
allowed during
transient current
EMV 4.0
ISO-7816-3
4.6V
4.5V
Max
transient
current
charge
30nA.s
20nA.s
Min VPC
Power
Supply
required
4.75V
4.75V
System Requirements
Capacitor
Type
X5R/X7R
w/
ESR < 100mΩ
Capacitor Value
3.3 µF
1µF
Table 1: Choice of VCC pin capacitor
OVER-TEMPERATURE MONITOR
A built-in detector monitors die temperature. Upon over-temperature condition (most likely resulting from a heavily
loaded card interface, including short circuits), a card deactivation sequence is initiated, and a fault condition is
reported to the system controller (sets bit 4 of the status register and generates an interrupt).
ON-CHIP OSCILLATOR AND CARD CLOCK
The TERIDIAN 73S8010R device has an on-chip oscillator that can generate the smart card clock using an
external crystal, connected between the pins XTALIN and XTALOUT, to set the oscillator frequency. When the
card clock signal is available from another source, it can be connected to the pin XTALIN, and the pin XTALOUT
should be left unconnected.
The card clock frequency may be chosen between 4 different division rates, defined by bits 5 and 6 of the I2C
Control register, as per the following table:
Bit
Clksel2
0
0
1
1
Bit
Clksel1
0
1
0
1
Card Clock
Clkin/8
Clkin/4
Clkin/2
Clkin (Xtalin)
Card power down mode (card clock STOP) is supported and is controllable through the dedicated digital inputs
bits 3 and 4 of the I2C Control register, respectively Clock Stop, and Clock Stop Level.
Page: 9 of 24
© 2005-2008 TERIDIAN Semiconductor Corporation
Rev 1.5
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