HD74ALVC16835 查看數據表（PDF） - Hitachi -> Renesas Electronics

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HD74ALVC16835

18-bit Universal Bus Driver with 3-state Outputs

Hitachi -> Renesas Electronics 

HD74ALVC16835

18-bit Universal Bus Driver with 3-state Outputs

ADE-205-192E (Z)

Preliminary

6th. Edition

January 1999

Description

The HD74ALVC16835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation.

Data flow from A to Y is controlled by output enable (OE). The device operates in the transparent mode

when the latch enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or

low logic level. If LE is low, the A data is stored in the latch/flip flop on the low to high transition of the

CLK. When OE is high, the outputs are in the high impedance state.

To ensure the high impedance state during power up or power down, OE should be tied to VCC through a

pullup registor; the minimum value of the registor is determined by the current sinking capability of the

driver.

Features

• Meets “PC SDRAM registered DIMM design support document, Rev. 1.2”

• VCC = 2.3 V to 3.6 V

• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)

• High output current ±24 mA (@VCC = 3.0 V)

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