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NDT3055 查看數據表(PDF) - Fairchild Semiconductor

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NDT3055 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
May 1998
NDT3055
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for
low voltage applications such as DC motor control and
DC/DC conversion where fast switching, low in-line
power loss, and resistance to transients are needed.
Features
4 A, 60 V. RDS(ON) = 0.100 @ VGS = 10 V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
SuperSOTTM-3
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
D
D
D
D
S
S
D
G
SOT-223
G
D
S
G
SOT-223*
G
(J23Z)
Absolute Maximum Ratings TA = 25oC unless otherwise noted
Symbol Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage - Continuous
ID
Maximum Drain Current - Continuous (Note 1a)
- Pulsed
PD
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
* Order option J23Z for cropped center drain lead.
(Note 1a)
(Note 1)
NDT3055
60
±20
4
25
3
1.3
1.1
-65 to 150
42
12
© 1998 Fairchild Semiconductor Corporation
S
Units
V
V
A
W
°C
°C/W
°C/W
NDT3055 Rev.B

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