LHF16KA7 查看數據表（PDF） - Sharp Electronics

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产品描述 (功能)

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LHF16KA7

Flash Memory 16M (2MB × 8/1MB × 16)

Sharp Electronics 

SHARP

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LHFlGKA7

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1

2 PRINCIPLES OF OPERATION

The LH28F160S3HT-Ll OA Flash memory includes

an on-chip WSM to manage block erase, full chip

erase, (multi) word/byte write and block lock-bit

configuration functions. It allows for: 100% TTL-level

control inputs, fixed power supplies during block

erase, full chip erase, (multi) word/byte write and

block lock-bit configuration, and minimal processor

overhead with RAM-Like interface timings.

After initial device power-up or return from deep

power-down mode (see Bus Operations), the device

defaults to read array mode. Manipulation of external

memory control pins allow array read, standby, and

output disable operations.

Status :egister, query structure and identifier codes

can be accessed through the CUI independent of the

V,, voltage. High voltage on VPP enables successful

block erase, full chip erase, (multi) word/byte write

and block lock-bit configuration. All functions

associated with altering memory contents-block

erase, full chip erase, (multi) word/byte write and

block lock-bit configuration, status, query and

identifier codes-are accessed via the CUI and

verified through the status register.

Commands are written using standard

microprocessor write timings. The CUI contents serve

as input to the WSM, which controls the block erase,

full chip erase, (multi) word/byte write and block lock-

bit configuration. The internal algorithms are

regulated by the WSM, including pulse repetition,

internal verification, and margining of data.

Addresses and data are internally latch during write

cycles. Writing the appropriate command outputs

array data, accesses the identifier codes, outputs

query structure or outputs status register data.

Interface software that initiates and polls progress of

block erase, full chip erase, (multi) word/byte write

and block lock-bit configuration can be stored in any

block. This code is copied to and executed from

system RAM during flash memory updates. After

successful completion, reads are again possible via

the Read Array command. Block erase suspend

allows system software to suspend a block erase to

read or write data from any other block. Write

suspend allows system software to suspend a (multi)

word/byte write to read data from any other flash

memory array location.

64K-byte Block

3’1

1AFFFF

1 AOOW

64K-byte Block

26

ISFFFF

1SOOCKl

1SFFFF

laOW0

17FFFF

17OmO

IGFFFF

160000

64K-byte Block

25

64K-byte Block

24

64K-byte Block

23

64K-byte Block

22

15FFFF

64K-byte Block

21

15OoM)

14FFFF

14oooo

64K-byte Block

20

13FFFF

,-mm

64K-byte Block

19

IPFFFF

4~cyyI

64K-byte Block

‘81

1lFFFF

11ocw

1OFFFF

lcmoa

64K-byte Block

17

64K-byte Block

16

OFFFFF

64K-byte Block

15

OFOOOO

OEFFFF

64K-byte Block

14

OEOOOO

OIJFFFF

ODoooO

64K-byte Block

13

OCFFFF

ocoooo

64K-byte Block

12

OBFFFF

64K-byte Block

11

OAFFFF

OAOWO

OSFFFF

OSOWO

08FFFF

OKCOO

07FFFF

07wOo

OGFFFF

060000

OBFFFF

nE-n

04FFFF

04OWO

OIFFFF

03Ocm

OZFFFF

OZWOO

01 FFFF

01wo0

OOFFFF

64K-byte Block

10

64K-byte Block

9

64K-byte Block

8

64K-byte Block

7

64K-byte Block

6

64K-byte Block

5

64K-byte Block

4

64K-byte Block

3

64K-byte Block

2

64K-byte Block

1

64K-bvte Block

0

Figure 3. Memory Map

L

Rev. 1.9

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