MCP3421 查看數據表（PDF） - Microchip Technology

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MCP3421

18-Bit Analog-to-Digital Converter with I2C Interface and On-Board Reference

Microchip Technology 

MCP3421

ELECTRICAL CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise specified, all parameters apply for TA = -40°C to +85°C, VDD = +5.0V, VSS = 0V,

VIN+ = VIN- = VREF/2. All ppm units use 2*VREF as full scale range.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Gain Error (Note 5)

—

0.05

0.35

%

PGA = 1, DR = 3.75 SPS

PGA Gain Error Match (Note 5)

—

0.1

—

%

Between any 2 PGA gains

Gain Error Drift (Note 5)

—

15

—

ppm/°C PGA=1, DR=3.75 SPS

Offset Error

VOS

—

15

Offset Drift vs. Temperature

Common-Mode Rejection

—

50

—

105

40

µV Tested at PGA = 1

VDD = 5.0V and DR = 3.75 SPS

—

nV/°C VDD = 5.0V

—

dB

at DC and PGA =1,

Gain vs. VDD

—

110

—

5

—

dB

at DC and PGA =8,

TA = +25°C

—

ppm/V TA = +25°C, VDD = 2.7V to 5.5V,

PGA = 1

Power Supply Rejection at DC

—

100

—

dB

TA = +25°C, VDD = 2.7V to 5.5V,

PGA = 1

Power Requirements

Voltage Range

Supply Current during

Conversion

VDD

2.7

—

IDDA

—

155

—

145

Supply Current during Standby

IDDS

—

0.1

Mode

I2C Digital Inputs and Digital Outputs

5.5

V

190

µA

VDD = 5.0V

—

µA

VDD = 3.0V

0.5

µA

High level input voltage

VIH

0.7 VDD

—

Low level input voltage

VIL

—

—

Low level output voltage

VOL

—

—

Hysteresis of Schmitt Trigger

VHYST 0.05VDD

—

for inputs (Note 7)

Supply Current when I2C bus

IDDB

—

—

line is active

VDD

0.3VDD

0.4

—

10

V

V

V

IOL = 3 mA, VDD = +5.0V

V

fSCL = 100 kHz

µA

Input Leakage Current

IILH

—

—

IILL

-1

—

Pin Capacitance and I2C Bus Capacitance

1

µA

VIH = 5.5V

—

µA

VIL = GND

Pin capacitance

I2C Bus Capacitance

CPIN

—

—

Cb

—

—

10

pF

400

pF

Note 1: Any input voltage below or greater than this voltage causes leakage current through the ESD diodes at the input pins.

This parameter is ensured by characterization and not 100% tested.

2: This input impedance is due to 3.2 pF internal input sampling capacitor.

3: The total conversion speed includes auto-calibration of offset and gain.

4: INL is the difference between the endpoints line and the measured code at the center of the quantization band.

5: Includes all errors from on-board PGA and VREF.

6: Full Scale Range (FSR) = 2 x 2.048/PGA = 4.096/PGA.

7: This parameter is ensured by characterization and not 100% tested.

8: This parameter is ensured by design and not 100% tested.

DS22003E-page 4

© 2009 Microchip Technology Inc.

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