24C64-RIT-A 查看數據表（PDF） - Estek Electronics Co. Ltd

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24C64-RIT-A

Two-wire Serial EEPROM

Estek Electronics Co. Ltd 

24C32 / 24C64

Write Operations

BYTE WRITE: A write operation requires two 8-bit data word address following the device address word and

acknowledgment. Upon receipt of this address, the EEPROM will again respond with a "0" and then clock in the first 8-

bit data word. Following receipt of the 8-bit data word, the EEPROM will output a "0" and the addressing device, such

as a microcontroller, must terminate the write sequence with a stop condition. At this time the EEPROM enters an

internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the

EEPROM will not respond until the write is complete (see Figure 5 on page 7).

PAGE WRITE: The 32K/64K EEPROM is capable of an 32-byte page write.

A page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first

data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can

transmit up to 31 (32K, 64K) more data words. The EEPROM will respond with a "0" after each data word received. The

microcontroller must terminate the page write sequence with a stop condition (see Figure 6 on page 7).

The data word address lower five (32K, 64K) bits are internally incremented following the receipt of each data word.

The higher data word address bits are not incremented, retaining the memory page row location. When the word

address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same

page. If more than 32 (32K, 64K) data words are transmitted to the EEPROM, the data word address will "roll over" and

previous data will be overwritten.

ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and the EEPROM inputs are disabled,

acknowledge polling can be initiated. This involves sending a start condition followed by the device address word. The

read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM

respond with a "0", allowing the read or write sequence to continue.

Read Operations

Read operations are initiated the same way as write operations with the exception that the read/write select bit in the

device address word is set to "1". There are three read operations: current address read, random address read and

sequential read.

CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during

the last read or write operation, incremented by one. This address stays valid between operations as long as the chip

power is maintained. The address "roll over" during read is from the last byte of the last memory page to the first byte

of the first page. The address "roll over" during write is from the last byte of the current page to the first byte of the

same page.

Once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the EEPROM, the

current address data word is serially clocked out. The microcontroller does not respond with an input "0" but does

generate a following stop condition (see Figure 7 on page 8).

BEIJING ESTEK ELECTRONICS CO.,LTD

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