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ICS8531-01

LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

Integrated Device Technology 

ICS8531-01

LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

APPLICATION INFORMATION

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

Figure 2 shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF ~ V /2 is

CC

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio

of R1 and R2 might need to be adjusted to position the V_REF in

the center of the input voltage swing. For example, if the input

clock swing is only 2.5V and V = 3.3V, V_REF should be 1.25V

CC

and R2/R1 = 0.609.

VCC

CLK_IN

C1

0.1uF

R1

1K

+

V_REF

-

R2

1K

FIGURE 2. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

INPUTS:

CLK/nCLK INPUT:

For applications not requiring the use of the differential input,

both CLK and nCLK can be left floating. Though not required, but

for additional protection, a 1kΩ resistor can be tied from CLK to

ground.

OUTPUTS:

LVPECL OUTPUTS:

All unused LVPECL outputs can be left floating. We recommend

that there is no trace attached. Both sides of the differential output

pair should either be left floating or terminated.

PCLK/nPCLK INPUT:

For applications not requiring the use of a differential input, both

the PCLK and nPCLK pins can be left floating. Though not

required, but for additional protection, a 1kΩ resistor can be tied

from PCLK to ground.

LVCMOS CONTROL PINS:

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1kΩ resistor can be used.

IDT™ / ICS™ 1-TO-9, 3.3V LVPECL FANOUT BUFFER

8

ICS8531AY-01 REV. F APRIL 11, 2007

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