OP15 查看數據表（PDF） - Analog Devices
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OP15 Datasheet PDF : 12 Pages
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OP15/OP17
Electrical Characteristics (@ VS = ±15 V, –55؇C £ TA £ 125؇C, unless otherwise noted.)
Parameter
Symbol Conditions
Min Typ Max
Units
Input Offset Voltage
Average Input Offset Voltage Drift1
Without External Trim
With External Trim
Input Offset Current2
OP17
Input Bias Current2
OP17
VOS
TCVOS
TCVOS
IOS
IB
RS = 50 W
RP = 100 W
TJ = 125∞C
TA = 125∞C, device operating
TJ = 125∞C
TA = 125∞C, device operating
0.4 0.9
2
5
2
0.6 4.0
1.0 8.5
±1.2 ±5.0
±2.0 ±11
mV
mV/∞C
mV/∞C
nA
nA
nA
nA
Input Voltage Range
Common-Mode Rejection Ratio
IVR
CMRR
VCM = ± 10.4 V
± 10.4
V
85
97
dB
Power Supply Rejection Ratio
PSRR
VS = ± 10 V to ± 18 V
15 57
mV/V
Large Signal Voltage Gain
AVO
RL ≥ 2 kW, VO = ± 10 V
35
120
V/mV
Output Voltage Swing
VO
RL ≥ 10 kW
±12 ±13
V
NOTES
1Sample tested.
2Input bias current is specified for two different conditions. The TJ = 25∞C specification is with the junction at ambient temperature; the device operating specification
is with the device operating in a warmed-up condition at 25∞C ambient. The warmed-up bias current value is correlated to the junction temperature value via the
curves of IB versus TJ and IB versus TA. ADI has a bias current compensation circuit which gives improved bias current over the standard JFET input op amps. I B and
IOS are measured at VCM = 0.
ELECTRICAL CHARACTERISTICS (@ VS = ؎15 V, 0؇C £ TA £ 70؇C for E and F grades, –40؇C £ TA £ 85؇C for G grades
unless otherwise noted)
Parameter
Symbol Conditions
OP15E/OP17E
OP15F/OP17F
OP15G/OP17G
Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VOS
Average Input Offset
Voltage Drift1
Without External Trim TCVOS
With External Trim TCVOSn
Input Offset Current2 IOS
OP15
OP17
Input Bias Current2 IB
OP15
OP17
Input Voltage Range IVR
Common-Mode
Rejection Ratio
CMRR
Power Supply
Rejection Ratio
PSRR
Large Signal
AVO
Voltage Gain
Output Voltage
VO
Swing
RS = 50 W
0.3 0.75
0.55 1.5
0.7 3.8 mV
RP = 100 W
TJ = 70∞C
TA = 70∞C, Device Operating
TJ = 70∞C
TA = 70∞C, Device Operating
TJ = 70∞C
TA = 70∞C, Device Operating
TJ = 70∞C
TA = 70∞C, Device Operating
± 10.4
VCM = ± 10.4 V
85
VCM = ± 10.25 V
VS = ± 10 V to ± 18 V
VS = ± 10 V to ± 15 V
RL ≥ 2 kW
65
VO = ± 10 V
RL ≥ 10 kW
± 12
2
5
2
0.04 0.30
0.06 0.55
0.04 0.30
0.07 0.70
± 0.10
± 0.13
± 0.10
± 0.15
± 0.40
± 0.75
± 0.40
± 0.90
98
± 10.4
85
13 57
200
50
± 13
± 12
3
10
3
0.06 0.45
0.08 0.80
0.06 0.45
0.10 1.1
± 0.12
± 0.16
± 0.12
± 0.20
± 0.60
± 1.1
± 0.60
± 1.4
96
13 57
180
± 13
4
30 mV/∞C
4
mV/∞C
0.08 0.85 nA
0.10 1.2 nA
0.08 0.85 nA
0.15 1.7 nA
± 0.14
± 0.19
± 0.14
± 0.25
± 0.80 nA
± 1.5 nA
± 0.80 nA
± 2.0 nA
± 10.25
V
dB
80
94
dB
mV/V
20 100 mV/V
35
160
V/mV
± 12
± 13
V
NOTES
1Sample tested.
2Input bias current is specified for two different conditions. The TJ = 25∞C specification is with the junction at ambient temperature; the device operating specification
is with the device operating in a warmed-up condition at 25∞C ambient. The warmed-up bias current value is correlated to the junction temperature value via the
curves of IB versus TJ and IB versus TA. ADI has a bias current compensation circuit which gives improved bias current over the standard JFET input op amps. I B and
IOS are measured at VCM = 0.
REV. A
–3–
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