MC100H640 查看數據表（PDF） - Motorola => Freescale

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MC100H640

68030/040 PECL–TTL Clock Driver

Motorola => Freescale 

MC10H640 MC100H640

6.2

4.75 V

6.0

5V

5.25 V

5.8

5.6

5.4

5.2

0

25

50

75

85

CLOAD (pF)

Figure 7. TP versus Load Typical at TA = 25°C

DT

RESET, R

Rtrec

Rtpw

Q0, Q1, Q2, Q3

Q0, Q1

Q4, Q5

Figure 8. MC10H/100H640 Clock Phase and Reset Recovery Time After Reset Pulse

Din

Q0 Q3

Q1 Q2

Q4 & Q5

AFTER POWER UP

OUTPUTS Q4 & Q5 WILL SYN WITH POSITIVE EDGES OF Din & Q0 Q3 & NEGATIVE EDGES OF Q0 & Q1

Figure 9. Output Timing Diagram

MOTOROLA

2–6

MECL Data

DL122 — Rev 6

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