IDT74FCT16952AT 查看數據表（PDF） - Integrated Device Technology
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IDT74FCT16952AT Datasheet PDF : 7 Pages
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IDT74FCT16925AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
TEST CIRCUITS AND WAVEFORMS
INDUSTRIAL TEMPERATURE RANGE
V CC
7.0V
V IN
Pulse
Generator
D.U.T.
RT
V OUT
50pF
CL
500Ω
500Ω
Test Circuits for All Outputs
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
DATA
INPUT
T IM IN G
INPUT
tSU
tH
ASYNCHRONOUS CONTROL
PRESET
tREM
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU
tH
ETC.
Set-up, Hold, and Release Times
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
Propagation Delay
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
L O W -H IG H -L O W
PULSE
H IG H -LO W -H IG H
PULSE
tW
Pulse Width
1.5V
1.5V
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
ENABLE
CONTROL
IN P U T
OUTPUT
NORMALLY
LOW
tPZL
SWITCH
CLOSED
tPZH
OUTPUT
NORMALLY
H IG H
SW ITCH
OPEN
D IS A B L E
tPLZ
3.5V
1.5V
0.3V
tPHZ
1.5V
0V
0.3V
3V
1.5V
0V
3.5V
VOL
VOH
0V
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
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