SMP30
Figure 8: Variation of thermal impedance
junction to ambient versus pulse duration
(Printed circuit board FR4, SCu=35µm,
recommended pad layout)
Zth(j-a)(°C/W)
1E+2
1E+1
Zth(j-a)
1E+0
1E-1
1E-3
1E-2
1E-1
tp(s)
1E+0
1E+1
1E+2 5E+2
Figure 9: Relative variation of junction
capacitance versus reverse voltage applied
(typical values)
C[VR] / C[VR=50V]
2.5
2.0
1.5
1.0
0.5
0.0
1
2
VR(V)
5
10
20
Tj=25°C
F=1MHz
VRMS=1V
50 100
300
Figure 10: Test circuit 1 for dynamic IBO and VBO parameters
100 V / µs, di /dt < 10 A / µs, Ipp = 30 A
2Ω
U
10 µF
45 Ω
66 Ω 470 Ω
83 Ω
0.36 nF
46 µH
KeyTek 'System 2' generator with PN246I module
1 kV / µs, di /dt < 10 A / µs, Ipp = 10 A
26 µH
250 Ω
47 Ω
46 µH
U
60 µF
12 Ω
KeyTek 'System 2' generator with PN246I module
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