IRF520(2002) 查看數據表（PDF） - STMicroelectronics

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IRF520
(Rev.:2002)

N-CHANNEL 100V - 0.115 Ω - 10A TO-220 LOW GATE CHARGE STripFET™ II POWER MOSFET

STMicroelectronics 

IRF520

N-CHANNEL 100V - 0.115 Ω - 10A TO-220

LOW GATE CHARGE STripFET™ II POWER MOSFET

TYPE

VDSS

RDS(on)

ID

IRF520

100 V <0.27 Ω

10 A

s TYPICAL RDS(on) = 0.115Ω

s AVALANCHE RUGGED TECHNOLOGY

s 100% AVALANCHE TESTED

s LOW GATE CHARGE

s HIGH CURRENT CAPABILITY

s 175 oC OPERATING TEMPERATURE

DESCRIPTION

This MOSFET series realized with STMicroelectronics

unique STripFET™ process has specifically been

designed to minimize input capacitance and gate charge.

It is therefore suitable as primary switch in advanced

high-efficiency, high-frequency isolated DC-DC

converters for Telecom and Computer applications. It is

also intended for any applications with low gate drive

requirements.

APPLICATIONS

s HIGH CURRENT, HIGH SWITCHING SPEED

s SOLENOID AND RELAY DRIVERS

s REGULATOR

s DC-DC & DC-AC CONVERTERS

s MOTOR CONTROL, AUDIO AMPLIFIERS

s AUTOMOTIVE ENVIRONMENT (INJECTION,

ABS, AIR-BAG, LAMPDRIVERS, etc.)

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

VDS

Drain-source Voltage (VGS = 0)

VDGR

Drain-gate Voltage (RGS = 20 kΩ)

VGS

Gate- source Voltage

ID

Drain Current (continuous) at TC = 25°C

ID

Drain Current (continuous) at TC = 100°C

IDM(•) Drain Current (pulsed)

Ptot

Total Dissipation at TC = 25°C

Derating Factor

dv/dt (1) Peak Diode Recovery voltage slope

EAS (2) Single Pulse Avalanche Energy

Tstg

Storage Temperature

Tj

Operating Junction Temperature

(•) Pulse width limited by safe operating area.

August 2002

NEW DATASHEET ACCORDING TO PCN DSG/CT/0C23.

3

2

1

TO-220

INTERNAL SCHEMATIC DIAGRAM

Value

100

100

± 20

10

7

40

60

0.4

20

100

Unit

V

V

V

A

A

A

W

W/°C

V/ns

mJ

-55 to 175

°C

(1) ISD ≤10A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX

(2) Starting Tj = 25 oC, ID = 10A, VDD = 50V

1/8

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