SN74LS290N 查看數據表（PDF） - ON Semiconductor
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SN74LS290N Datasheet PDF : 7 Pages
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SN74LS290
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V, CL = 15 pF)
Symbol
Parameter
Min
fMAX
CP0 Input Clock Frequency
32
fMAX
CP1 Input Clock Frequency
16
tPLH
Propagation Delay,
tPHL
CP0 Input to Q0 Output
tPLH
tPHL
CP0 Input to Q3 Output
tPLH
tPHL
CP1 Input to Q1 Output
tPLH
tPHL
CP1 Input to Q2 Output
tPLH
tPHL
CP1 Input to Q3 Output
tPHL
MS Input to Q0 and Q3 Outputs
tPHL
MS Input to Q1 and Q2 Outputs
tPHL
MR Input to Any Output
LS290
Typ
10
12
32
34
10
14
21
23
21
23
20
26
26
Limits
Max Min
32
16
16
18
48
50
16
21
32
35
32
35
30
40
40
LS293
Typ
10
12
46
46
10
14
21
23
34
34
26
Max
16
18
70
70
16
21
32
35
51
51
40
Unit
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Limits
LS290
LS293
Symbol
Parameter
Min Max Min Max
Unit
tW
CP0 Pulse Width
15
15
ns
tW
CP1 Pulse Width
30
30
ns
tW
MS Pulse Width
15
ns
tW
MR Pulse Width
15
15
ns
trec
Recovery Time MR to CP
25
25
ns
RECOVERY TIME (trec) is defined as the minimum time required between the end of the reset pulse and the clock transition form HIGH-to-LOW in order to
recognize and transfer HIGH data to the Q outputs.
AC WAVEFORMS
*CP 1.3 V
tPHL
Q
1.3 V
1.3 V
tW
tPLH
1.3 V
Figure 1
*The number of Clock Pulses required between the tPHL and tPLH measurements can be determined from the appropriate Truth Tables.
MR & MS
1.3 V
CP
tPHL
Q
1.3 V
tW
trec
1.3 V
1.3 V
MS
1.3 V
CP
Q0 V Q3
(LS290)
tPLH
1.3 V
tW
trec
1.3 V
1.3 V
Figure 2
Figure 3
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