Q67100-H5164 查看數據表（PDF） - Siemens AG
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Q67100-H5164 Datasheet PDF : 41 Pages
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SDA 5650/X
2.3 Order of Data Output on the I2C Bus and Bit Allocation of PDC/VPS
Operating Modes
I2C Bus
t Byte 1
Byte 2
Byte 3
Byte 4
bit 7
6
5
4
3
2
1
0
bit 7
6
5
4
3
2
1
0
bit 7
6
5
4
3
2
1
0
bit 7
6
5
4
3
2
1
0
PDC Packet 8/30
Format 1
Format 2
byte 15
bit 02)
1
2
3
4
5
6
7
byte 16
byte 17
bit 01)
1
2
3
bit 0
1
2
3
byte 16
bit 0
1
2
3
4
5
6
7
byte 18
byte 19
bit 0
1
2
3
bit 0
1
2
3
byte 17
bit 0
1
2
3
4
5
6
7
byte 20
byte 21
bit 0
1
2
3
bit 0
1
2
3
byte 18
bit 0
1
2
3
4
5
6
7
byte 22
byte 23
bit 0
1
2
3
bit 0
1
2
3
VPS Mode
byte 11
byte 12
byte 13
byte 14
bit 02)
1
2
3
4
5
6
7
bit 0
1
2
3
4
5
6
7
bit 0
1
2
3
4
5
6
7
bit 0
1
2
3
4
5
6
7
1) Message bit numbers according to EBU specification of PDC system.
2) Transmission bit number.
Semiconductor Group
13
02.97
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