Q67100-H5164 查看數據表（PDF） - Siemens AG
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Q67100-H5164 Datasheet PDF : 41 Pages
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SDA 5650/X
2.4 Order of Data Output on the I2C Bus and Bit Allocation for the Header
Time Mode (MAB=0) (cont’d)
I2C Bus
t
Byte 5 bit 7
6
5
4
3
2
1
0
Byte 6
bit 7
6
5
4
3
2
1
0
Byte 7
bit 7
6
5
4
3
2
1
0
Byte 8
bit 7
6
5
4
3
2
1
0
Header Time Mode
byte 42
bit 02)
1
2
3
4
5
6
7
byte 43
bit 0
1
2
3
4
5
6
7
byte 44
bit 0
1
2
3
4
5
6
7
byte 45
bit 0
1
2
3
4
5
6
7
1) Message bit numbers according to EBU specification of PDC system.
2) Transmission bit number.
Semiconductor Group
18
02.97
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